To expand and adopt into the world's first wearable devices
Improved 20% CPU and 10x graphics from the previous model
Total integration of advanced packaging technologies such as FO-PLP
Proved SoC te
Samsung Electronics will equip smart watch 'Galaxy Watch 4' to be released on the 11th with a 5nm-based processor applied with extreme ultraviolet (EUV) process, becoming the first to use the EUV process for a wearable device processor. It is read as an aspiration to take the lead in the advanced system semiconductor market by expanding the EUV process that can draw ultra-fine circuits to the wearable process.
On the 10th, Samsung Electronics announced that it has launched 'Exynos W920', a wearable processor based on the latest 5nm process.
Exynos W920 is the first wearable processor to apply EUV process. Samsung Electronics, which has recently announced that it will expand EUV process layer from 1 to 5 for 14nm DRAM memory (DDR5), is applying EUV to wearable processors and greatly expanding the range of advanced micro-processing applications.
The new product improved performance and power efficiency much more greatly from the existing products through the latest design technology. Compared to Exynos 9110 released in 2018, Exynos W920 has improved central processing unit (CPU) performance by 20% and graphics performance by up to 10 times. CPU and graphic processing unit (GPU) cores are equipped with ARM's low-power 'Cortex A55' and 'Mali-G68', respectively.
'Cortex-M55' for low-power display was added to minimize the processor's display driving power consumption in 'Always On Display (AOD)' mode. This function allows users to check clock, alarm, and missed calls at all times without turning on the entire screen.
The application of cutting-edge packaging technology to realize ultra-small packages for wearables is also notable. A main example is Fan-Out Panel Level Packaging (FO-PLP), a cutting-edge technology that improves heat dissipation and electrical characteristics by pulling input/output (I/O) terminal wiring out of the chip without a printed circuit board (PCB) board. Packaging on a square panel can decrease the size of semiconductor chips and increase production. Since 2018, Samsung Electronics has been applying FO-PLP technology to its wearable processors. Moreover, the advanced packaging technology SIP-ePOP technology was applied, which includes an application processor (AP), DRAM, NAND flash, internal memory semiconductor (eMMC) for data storage, and the power management semiconductor (PMIC) in one package. They are essential for miniaturization of wearable devices.
Samsung Electronics is expected to resolve concerns about its system-on-chip (SoC) competitiveness raised by some, by integrating advanced packaging technologies including EUV into the new Exynos.
In announcing Samsung Electronics' 2Q results last month, Jang-ho Cho, the Executive Director of the System LSI Business Unit at Samsung Electronics', said, "I understand the market concerns regarding Exynos. We are making efforts in various ways to enhance our competitiveness, such as improving performance and power efficiency by introducing new GPU design assets (IP).” It is interpreted that Samsung Electronics is trying to prove its SoC competitiveness through Exynos W920.
Exynos W920 supports 'Wear OS', a new integrated platform developed by Samsung and Google. It will be installed in the next-generation smart watch Galaxy Watch 4 series to be unveiled along with Samsung Galaxy Z Fold 3 and Flip 3.
“Smartwatches are not just devices but are developing into core wearable devices that are responsible for the health and fun of users,” said Executive Director Cho. The next-generation wearable device equipped with Exynos W920 will provide seamless Long-term Evolution (LTE) communication as well as a visually superior interface and fast user experience.”
By Staff Reporter Dong-jun Kwon / email@example.com