Samsung Electronics is gearing up for development of 3nm foundry process. After announcing the roadmap for 3nm ultra-fine process for 2020 last year, it has taken another step forward towards implementing 3nm foundry process by introducing relevant PDK (Process Design Kit) this year. While it is competing with TSMC regarding foundry business, it is looking to grab leadership in foundry industry by grabbing an upper hand in 3nm process.
Samsung Electronics introduced PDK that will go into its 3nm process at ‘Samsung Foundry Forum 2019’ that was held at Marriott Hotel in Santa Clara on the 14th (U.S. time).
PDK is a data file that supports with design that is optimized for manufacturing process of a foundry business. A semiconductor design business is able to design products easier through PDK which can reduce time it takes for products to be on markets and increase competitiveness.
Introducing PDK does not indicate that Samsung Electronics finished developing 3nm process. However, it indicates that Samsung Electronics is the frontrunner of 3nm system that has not been introduced by other foundry competitors.
At last year’s forum, Samsung Electronics announced that it would implement state-of-the-art GAA (Gate-All-Around), which can apply semiconductor transistor gate on all sides, through its 3nm process. This year, it put out its first product by distributing 3GAE(3nm Gate-All-Around Early, 1st generation GAA)PDK.
“3GAE process can reduce size of a chip by 45% compared to 7nm FinFET, which is the latest process, and it can bring 50% power reduction and 35% performance improvement.” said a representative for Samsung Electronics. “We are introducing PDK first because there can be issues with chip production by Samsung Electronics and semiconductor design businesses if we introduce PDK in 2020 when we implement 3nm process in 2020.”
Samsung Electronics is planning to provide advantages that are differentiated through MBCFETTM (Multi Bridge Channel FET) method from 3nm process. MBCFETTM enhances GAA structure, which is in a form of a thin and long wire, to stack nano-sheets that are thin and long like papers. Its advantage is that it is able to utilize current facilities and manufacturing technologies due to its compatibility with FinFET process and ability to increase power efficiency.
It also announced that it started SAFETM-Cloud service to provide more convenience regarding semiconductor design to its fabless customers. This service will be carried out along with AWS (Amazon Web Service), Microsoft, EDA (Electronic Design Automation) business called Cadence, and Synopsys. Through this service, semiconductor design businesses can utilize PDK, DM (Design Method), EDA tool, and design asset that are provided by Samsung Electronics and its partners to reduce investments costs and to manufacture semiconductors faster.
800 people from global fabless customers and partners participated in this forum and shared various semiconductor technologies that will lead the Fourth Industrial Revolution.
“Not only advanced technologies in semiconductor process, production, and packaging areas are important, but trust and sharing of visions with foundry businesses, customers, and partners is also very important.” said President Jung Eun-seung of Samsung Electronics’ Foundry Business Department.
Staff Reporter Kang, Haeryung | kang@etnews.com